The present disclosure relates to data access protection for computer systems, and more specifically, to protection of data that is accessible using inter integrated data buses and protocols.
Computer systems can use simple protocols to access devices during early stages of the boot process. One such protocol is the inter-integrated circuit (I2C) bus protocol. The I2C bus protocol can operate using master device and slave devices that are connected by way of a serial communication bus. During the early stages of the boot process, the computer can write to a control register of an I2C master device. The I2C master device can generate an I2C message on the I2C communication bus. A slave device that corresponds to an address in the I2C message can respond appropriately.